Performance of the HADES Ring Image Processing Hardware
II. Physikalisches Institut, Justus-Liebig-Universitat GieBen
for the HADES collaboration
The HADES detector at GSI investigates the production of e+ e- pairs in pion, proton and
heavy ion induced reactions up to 2 AGeV. A hardware - based dielectron trigger system is
used to reduce the first level event rate of 105 Hz by a factor of 100.
The most selective component of the trigger system identifies electron and positron
candidates in real time using data from the hadron blind HADES RICH detector.
Images of asymptotic rings are detected by using the hit pattern information from a CsI
cathode pad array and employing a fixed search mask consisting of groups of correlated pads
both on the ring circumference and in inner and outer veto regions. The FPGA based ring
recognition hardware processes a complete pad plane in less than 10 microseconds, its
complete latency including data transfer is on average below 40 microseconds.
The full ring recognition setup was operated during several in-beam tests. The performance of
the hardware, the functionality of the ring recognition algorithm as well as some of its
characteristics are reported.
The results demonstrate the ability of the hardware to perform the online ring recognition with
the performance required by the second level trigger system.